Skills

Embedded C
PADS Layout
VHDL
Verilog

Experience

August 2015 - June 2016
Processor Systems (Bangalore)

Generic Industrial Tester Board - designed an automated testing framework by generating AC, DC and RTD test inputs which was used for testing multi-channel host boards. Roles included understanding product requirements, comparing datasheets and specification, literature survey, design of high-level Block diagram, Selection of components, Power budgeting, Schematic entry in PADS Logic , Placement and Floor planning, PCB routing in PADS Layout and eventually Board bring-up and Testing.

March 2016 - July 2016
SAMEER

Hands on experience in Design Consultancy and Product Testing for EMI/EMC including IEC 61000 standards for Electrical Fast Transient, high energy Surge, AC Dips and Short interruption, DC Dips and voltage variation, ESD, Harmonic and Flicker emission, etc in Conducted Susceptibility Lab. Experience in anechoic chambers for RE/RS and Conducted Emission Lab facilities.

September 2017 - Present
IIT Madras

Works for TeNet Group under Padma Shri Prof. Dr. Ashok Jhunjhnwala for transforming rural India. Working on AC-DC convertors and Grid Tie Inverters.

Job Roles

Hardware Intern

August 2015 to June 2016

Research Scientist

March 2017 to July 2017

Research Associate

September 2018 to Present